Abstract
In this work, we analyze the electrical characteristics of MOS capacitors fabricated on strained silicon substrates using the commercial software Taurus/Synopsis. The effect of various parameters such as Germanium concentration in the Si1-xGex virtual substrate, thickness of the strained-Silicon layer, oxide thickness, fixed charge and interface trapped charge on capacitance - voltage characteristics is examined. Experimental data are compared with simulation results. A strong influence of the s-Si/SiGe heterostructure and its proximity to the s-Si/SiO2 on the electrical characteristics of the system exists. Oxide charge inserted into simulation in order to fit experimental data shows an increase of charge with decreasing s-Si thickness. The effect of interface traps on simulated C-V characteristics is identical when traps are situated in the s-Si/SiO2 or the s-Si/SiGe interface. When increasing the thermal budget by increasing the post oxidation annealing time, the decrease of the hump phenomenon on the C-V curves can be attributed to the Germanium diffusion, according to simulation.
Original language | English |
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Pages (from-to) | 3647-3650 |
Number of pages | 4 |
Journal | Physica Status Solidi (C) Current Topics in Solid State Physics |
Volume | 5 |
Issue number | 12 |
DOIs | |
Publication status | Published - 2008 |
Externally published | Yes |
Keywords
- Capacitance voltages
- Commercial softwares
- Electrical characteristics
- Experimental datums
- Fixed charges
- Germanium concentrations
- Heterostructure
- interface traps
- Oxide charges
- Strained silicons
- Trapped charges
- V curves
- Virtual substrates
ASJC Scopus subject areas
- Condensed Matter Physics