Retrograde p-well for 10kV-class SiC IGBTs

Amit K. Tiwari, Marina Antoniou, Neophytos Lophitis, Samuel Perkins, Tatjana Trajkovic, Florin Udrea

Research output: Contribution to journalArticle

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Abstract

In this paper, we propose the use of a retrograde doping profile for the p-well for ultrahigh voltage (>uexcl;10 kV) SiC IGBTs. We show that the retrograde p-well effectively addresses the punchthrough issue, whereas offering a robust control over the gate threshold voltage. Both the punchthrough elimination and the gate threshold voltage control are crucial to high-voltage vertical IGBT architectures and are determined by the limits on the doping concentration and the depth that a conventional p-well implant can have. Without any punchthrough, a 10-kV SiC IGBT consisting of retrograde p-well yields gate threshold voltages in the range of 6-7 V with a gate oxide thickness of 100 nm. Gate oxide thickness is typically restricted to 50-60 nm in SiC IGBTs if a conventional p-well with 1 \times 10^{17} cm -3 is utilized. We further show that the optimized retrograde p-well offers the most optimum switching performance. We propose that such an effective retrograde p-well, which requires low-energy shallow implants and thus key to minimize processing challenges and device development cost, is highly promising for the ultrahigh-voltage (>10 kV) SiC IGBT technology.

Original languageEnglish
Article number8728169
Pages (from-to)3066-3072
Number of pages7
JournalIEEE Transactions on Electron Devices
Volume66
Issue number7
Early online date5 Jun 2019
DOIs
Publication statusPublished - Jul 2019

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Insulated gate bipolar transistors (IGBT)
Threshold voltage
Oxides
Electric potential
Doping (additives)
Robust control
Voltage control
Processing
Costs

Bibliographical note

© 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.

Keywords

  • Breakdown voltage
  • Punchthrough
  • Retrograde p-well
  • Sic igbts
  • Threshold voltage control

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

K. Tiwari, A., Antoniou, M., Lophitis, N., Perkins, S., Trajkovic, T., & Udrea, F. (2019). Retrograde p-well for 10kV-class SiC IGBTs. IEEE Transactions on Electron Devices, 66(7), 3066-3072. [8728169]. https://doi.org/10.1109/TED.2019.2918008

Retrograde p-well for 10kV-class SiC IGBTs. / K. Tiwari, Amit; Antoniou, Marina; Lophitis, Neophytos; Perkins, Samuel; Trajkovic, Tatjana; Udrea, Florin.

In: IEEE Transactions on Electron Devices, Vol. 66, No. 7, 8728169, 07.2019, p. 3066-3072.

Research output: Contribution to journalArticle

K. Tiwari, A, Antoniou, M, Lophitis, N, Perkins, S, Trajkovic, T & Udrea, F 2019, 'Retrograde p-well for 10kV-class SiC IGBTs' IEEE Transactions on Electron Devices, vol. 66, no. 7, 8728169, pp. 3066-3072. https://doi.org/10.1109/TED.2019.2918008
K. Tiwari A, Antoniou M, Lophitis N, Perkins S, Trajkovic T, Udrea F. Retrograde p-well for 10kV-class SiC IGBTs. IEEE Transactions on Electron Devices. 2019 Jul;66(7):3066-3072. 8728169. https://doi.org/10.1109/TED.2019.2918008
K. Tiwari, Amit ; Antoniou, Marina ; Lophitis, Neophytos ; Perkins, Samuel ; Trajkovic, Tatjana ; Udrea, Florin. / Retrograde p-well for 10kV-class SiC IGBTs. In: IEEE Transactions on Electron Devices. 2019 ; Vol. 66, No. 7. pp. 3066-3072.
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