Relationship between Jitter variance, Lock time and Phase noise of a second-order PLL.

Dipayan  Mazumdar; Govind Kadambi; Yuri Vershinin

doi:10.4172/2325-9833.1000172

Relationship between Jitter variance, Lock time and Phase noise of a second-order PLL.

Dipayan Mazumdar, Govind Kadambi, Yuri Vershinin

School of Mechanical, Aerospace and Automotive Engineering

Research output: Contribution to journal › Article › peer-review

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Abstract

This paper covers analytical relationships between phase noise, lock time and jitter variance. An expression is derived for Lock time in terms phase margin. Analytical expressions have been derived in this paper for the variation of Lock time with respect to Phase Margin and lock time with respect to its damping coefficient.

Original language	English
Article number	1000172
Number of pages	10
Journal	Journal of Electrical Engineering and Electronic Technology
Volume	8
Issue number	1
DOIs	https://doi.org/10.4172/2325-9833.1000172
Publication status	Published - 31 Jan 2019

Keywords

Phase Locked Loop
Phase Margin
Phase noise
Lock time
Jitter variance
Damping Coefficient
VCO sensitivity

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10.4172/2325-9833.1000172

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Yuri Vershinin
- School of Mechanical, Aerospace and Automotive Engineering - Assistant Professor Academic
Person: Teaching and Research

Cite this

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title = "Relationship between Jitter variance, Lock time and Phase noise of a second-order PLL.",

abstract = "This paper covers analytical relationships between phase noise, lock time and jitter variance. An expression is derived for Lock time in terms phase margin. Analytical expressions have been derived in this paper for the variation of Lock time with respect to Phase Margin and lock time with respect to its damping coefficient. ",

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KW - Phase Margin

KW - Phase noise

KW - Lock time

KW - Jitter variance

KW - Damping Coefficient

KW - VCO sensitivity

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