Relationship between Jitter variance, Lock time and Phase noise of a second-order PLL.

Yuri Vershinin, Dipayan Mazumdar, Govind Kadambi

Research output: Contribution to journalArticle

Abstract

This paper covers analytical relationships between phase noise, lock time and jitter variance. An expression is derived for Lock time in terms phase margin. Analytical expressions have been derived in this paper for the variation of Lock time with respect to Phase Margin and lock time with respect to its damping coefficient.
LanguageEnglish
Article number1000172
Number of pages10
JournalJournal of Electrical Engineering and Electronic Technology
Volume8
Issue number1
DOIs
Publication statusPublished - 31 Jan 2019

Fingerprint

Phase locked loops
Phase noise
Jitter
Damping

Keywords

  • Phase Locked Loop
  • Phase Margin
  • Phase noise
  • Lock time
  • Jitter variance
  • Damping Coefficient
  • VCO sensitivity

Cite this

Relationship between Jitter variance, Lock time and Phase noise of a second-order PLL. / Vershinin, Yuri; Mazumdar, Dipayan ; Kadambi, Govind.

In: Journal of Electrical Engineering and Electronic Technology, Vol. 8, No. 1, 1000172, 31.01.2019.

Research output: Contribution to journalArticle

@article{b1c2adffd28d40a4953415cbb2b68f03,
title = "Relationship between Jitter variance, Lock time and Phase noise of a second-order PLL.",
abstract = "This paper covers analytical relationships between phase noise, lock time and jitter variance. An expression is derived for Lock time in terms phase margin. Analytical expressions have been derived in this paper for the variation of Lock time with respect to Phase Margin and lock time with respect to its damping coefficient.",
keywords = "Phase Locked Loop, Phase Margin, Phase noise, Lock time, Jitter variance, Damping Coefficient, VCO sensitivity",
author = "Yuri Vershinin and Dipayan Mazumdar and Govind Kadambi",
year = "2019",
month = "1",
day = "31",
doi = "10.4172/2325-9833.1000172",
language = "English",
volume = "8",
journal = "Journal of Electrical Engineering and Electronic Technology",
issn = "2325-9833",
publisher = "OMICS International",
number = "1",

}

TY - JOUR

T1 - Relationship between Jitter variance, Lock time and Phase noise of a second-order PLL.

AU - Vershinin, Yuri

AU - Mazumdar, Dipayan

AU - Kadambi, Govind

PY - 2019/1/31

Y1 - 2019/1/31

N2 - This paper covers analytical relationships between phase noise, lock time and jitter variance. An expression is derived for Lock time in terms phase margin. Analytical expressions have been derived in this paper for the variation of Lock time with respect to Phase Margin and lock time with respect to its damping coefficient.

AB - This paper covers analytical relationships between phase noise, lock time and jitter variance. An expression is derived for Lock time in terms phase margin. Analytical expressions have been derived in this paper for the variation of Lock time with respect to Phase Margin and lock time with respect to its damping coefficient.

KW - Phase Locked Loop

KW - Phase Margin

KW - Phase noise

KW - Lock time

KW - Jitter variance

KW - Damping Coefficient

KW - VCO sensitivity

U2 - 10.4172/2325-9833.1000172

DO - 10.4172/2325-9833.1000172

M3 - Article

VL - 8

JO - Journal of Electrical Engineering and Electronic Technology

T2 - Journal of Electrical Engineering and Electronic Technology

JF - Journal of Electrical Engineering and Electronic Technology

SN - 2325-9833

IS - 1

M1 - 1000172

ER -