Novel Lockstep-based Approach with Roll-back and Roll-forward Recovery to Mitigate Radiation-Induced Soft Errors

Server Kasap; Eduardo  Weber Wachter; Xiaojun Zhai; Shoaib Ehsan; Klaus McDonald-Maier

doi:10.1109/norcas51424.2020.9265137

Novel Lockstep-based Approach with Roll-back and Roll-forward Recovery to Mitigate Radiation-Induced Soft Errors

Server Kasap, Eduardo Weber Wachter, Xiaojun Zhai, Shoaib Ehsan, Klaus McDonald-Maier

University of Essex

Research output: Chapter in Book/Report/Conference proceeding › Conference proceeding › peer-review

3 Citations (Scopus)

206 Downloads (Pure)

Abstract

An attractive option for realizing applications in radiation environments is to employ All-Programmable System-on-Chips (APSoCs) thanks to their high-performance computing and power efficiency merits. Despite APSoC’s advantages, like any other electronic device, they are prone to radiation effects. Processors found in APSoCs must, therefore, be adequately hardened against ionizing-radiation to become a viable alternative for harsh environments. This paper proposes a novel triple-core lockstep (TCLS) approach to secure the Xilinx Zynq-7000 APSoC dual-core ARM Cortex-A9 processor against radiation-induced soft errors by coupling it with a MicroBlaze TMR subsystem in Zynq’s programmable logic (PL) layer. The proposed strategy uses software-level checkpointing principles along with roll-back and roll-forward mechanisms (i.e. software redundancy), and hardware-level processor replication as well as checker circuits (i.e. hardware redundancy). Results of fault injection experiments show that the proposed solution achieved high soft error security by mitigating about 99% of bit-flips injected into both ARM cores’ register data.

Original language	English
Title of host publication	2020 IEEE Nordic Circuits and Systems Conference, NORCAS 2020 - Proceedings
Editors	Jari Nurmi, Dag T. Wisland, Snorre Aunet, Kristian Kjelgaard
Publisher	IEEE
Pages	1-7
Number of pages	7
ISBN (Electronic)	9781728192260
ISBN (Print)	9781728192277
DOIs	https://doi.org/10.1109/norcas51424.2020.9265137
Publication status	Published - 27 Oct 2020
Externally published	Yes
Event	2020 IEEE Nordic Circuits and Systems Conference - virtual, Oslo, Norway Duration: 27 Nov 2020 → 28 Nov 2020

Publication series

Name	2020 IEEE Nordic Circuits and Systems Conference, NORCAS 2020 - Proceedings

Conference

Conference	2020 IEEE Nordic Circuits and Systems Conference
Abbreviated title	NorCAS
Country/Territory	Norway
City	Oslo
Period	27/11/20 → 28/11/20

Bibliographical note

© 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.

UK Engineering and Physical Sciences Research Council through grants EP/R02572X/1 and EP/P017487/1

Keywords

ARM Cortex-A Processor
Fault Tolerance
MicroBlaze Processor
Soft Error Mitigation
Zynq APSoC

ASJC Scopus subject areas

Hardware and Architecture
Signal Processing
Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials
Instrumentation

Access to Document

10.1109/norcas51424.2020.9265137

Post-PrintAccepted author manuscript, 335 KBLicence: Unspecified

Cite this

Kasap, S., Weber Wachter, E., Zhai, X., Ehsan, S., & McDonald-Maier, K. (2020). Novel Lockstep-based Approach with Roll-back and Roll-forward Recovery to Mitigate Radiation-Induced Soft Errors. In J. Nurmi, D. T. Wisland, S. Aunet, & K. Kjelgaard (Eds.), 2020 IEEE Nordic Circuits and Systems Conference, NORCAS 2020 - Proceedings (pp. 1-7). Article 9265137 (2020 IEEE Nordic Circuits and Systems Conference, NORCAS 2020 - Proceedings). IEEE. https://doi.org/10.1109/norcas51424.2020.9265137

Novel Lockstep-based Approach with Roll-back and Roll-forward Recovery to Mitigate Radiation-Induced Soft Errors. / Kasap, Server; Weber Wachter, Eduardo ; Zhai, Xiaojun et al.
2020 IEEE Nordic Circuits and Systems Conference, NORCAS 2020 - Proceedings. ed. / Jari Nurmi; Dag T. Wisland; Snorre Aunet; Kristian Kjelgaard. IEEE, 2020. p. 1-7 9265137 (2020 IEEE Nordic Circuits and Systems Conference, NORCAS 2020 - Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference proceeding › peer-review

Kasap, S, Weber Wachter, E, Zhai, X, Ehsan, S & McDonald-Maier, K 2020, Novel Lockstep-based Approach with Roll-back and Roll-forward Recovery to Mitigate Radiation-Induced Soft Errors. in J Nurmi, DT Wisland, S Aunet & K Kjelgaard (eds), 2020 IEEE Nordic Circuits and Systems Conference, NORCAS 2020 - Proceedings., 9265137, 2020 IEEE Nordic Circuits and Systems Conference, NORCAS 2020 - Proceedings, IEEE, pp. 1-7, 2020 IEEE Nordic Circuits and Systems Conference , Oslo, Norway, 27/11/20. https://doi.org/10.1109/norcas51424.2020.9265137

Kasap S, Weber Wachter E, Zhai X, Ehsan S, McDonald-Maier K. Novel Lockstep-based Approach with Roll-back and Roll-forward Recovery to Mitigate Radiation-Induced Soft Errors. In Nurmi J, Wisland DT, Aunet S, Kjelgaard K, editors, 2020 IEEE Nordic Circuits and Systems Conference, NORCAS 2020 - Proceedings. IEEE. 2020. p. 1-7. 9265137. (2020 IEEE Nordic Circuits and Systems Conference, NORCAS 2020 - Proceedings). Epub 2020 Oct 24. doi: 10.1109/norcas51424.2020.9265137

Kasap, Server ; Weber Wachter, Eduardo ; Zhai, Xiaojun et al. / Novel Lockstep-based Approach with Roll-back and Roll-forward Recovery to Mitigate Radiation-Induced Soft Errors. 2020 IEEE Nordic Circuits and Systems Conference, NORCAS 2020 - Proceedings. editor / Jari Nurmi ; Dag T. Wisland ; Snorre Aunet ; Kristian Kjelgaard. IEEE, 2020. pp. 1-7 (2020 IEEE Nordic Circuits and Systems Conference, NORCAS 2020 - Proceedings).

@inproceedings{a3835efc95d64e4ab53972bf8e885d0f,

title = "Novel Lockstep-based Approach with Roll-back and Roll-forward Recovery to Mitigate Radiation-Induced Soft Errors",

abstract = "An attractive option for realizing applications in radiation environments is to employ All-Programmable System-on-Chips (APSoCs) thanks to their high-performance computing and power efficiency merits. Despite APSoC{\textquoteright}s advantages, like any other electronic device, they are prone to radiation effects. Processors found in APSoCs must, therefore, be adequately hardened against ionizing-radiation to become a viable alternative for harsh environments. This paper proposes a novel triple-core lockstep (TCLS) approach to secure the Xilinx Zynq-7000 APSoC dual-core ARM Cortex-A9 processor against radiation-induced soft errors by coupling it with a MicroBlaze TMR subsystem in Zynq{\textquoteright}s programmable logic (PL) layer. The proposed strategy uses software-level checkpointing principles along with roll-back and roll-forward mechanisms (i.e. software redundancy), and hardware-level processor replication as well as checker circuits (i.e. hardware redundancy). Results of fault injection experiments show that the proposed solution achieved high soft error security by mitigating about 99% of bit-flips injected into both ARM cores{\textquoteright} register data.",

keywords = "ARM Cortex-A Processor, Fault Tolerance, MicroBlaze Processor, Soft Error Mitigation, Zynq APSoC",

author = "Server Kasap and {Weber Wachter}, Eduardo and Xiaojun Zhai and Shoaib Ehsan and Klaus McDonald-Maier",

note = "{\textcopyright} 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. UK Engineering and Physical Sciences Research Council through grants EP/R02572X/1 and EP/P017487/1; 2020 IEEE Nordic Circuits and Systems Conference , NorCAS ; Conference date: 27-11-2020 Through 28-11-2020",

year = "2020",

month = oct,

day = "27",

doi = "10.1109/norcas51424.2020.9265137",

language = "English",

isbn = "9781728192277",

series = "2020 IEEE Nordic Circuits and Systems Conference, NORCAS 2020 - Proceedings",

publisher = "IEEE",

pages = "1--7",

editor = "Jari Nurmi and Wisland, {Dag T.} and Snorre Aunet and Kristian Kjelgaard",

booktitle = "2020 IEEE Nordic Circuits and Systems Conference, NORCAS 2020 - Proceedings",

address = "United States",

}

TY - GEN

T1 - Novel Lockstep-based Approach with Roll-back and Roll-forward Recovery to Mitigate Radiation-Induced Soft Errors

AU - Kasap, Server

AU - Weber Wachter, Eduardo

AU - Zhai, Xiaojun

AU - Ehsan, Shoaib

AU - McDonald-Maier, Klaus

N1 - © 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. UK Engineering and Physical Sciences Research Council through grants EP/R02572X/1 and EP/P017487/1

PY - 2020/10/27

Y1 - 2020/10/27

N2 - An attractive option for realizing applications in radiation environments is to employ All-Programmable System-on-Chips (APSoCs) thanks to their high-performance computing and power efficiency merits. Despite APSoC’s advantages, like any other electronic device, they are prone to radiation effects. Processors found in APSoCs must, therefore, be adequately hardened against ionizing-radiation to become a viable alternative for harsh environments. This paper proposes a novel triple-core lockstep (TCLS) approach to secure the Xilinx Zynq-7000 APSoC dual-core ARM Cortex-A9 processor against radiation-induced soft errors by coupling it with a MicroBlaze TMR subsystem in Zynq’s programmable logic (PL) layer. The proposed strategy uses software-level checkpointing principles along with roll-back and roll-forward mechanisms (i.e. software redundancy), and hardware-level processor replication as well as checker circuits (i.e. hardware redundancy). Results of fault injection experiments show that the proposed solution achieved high soft error security by mitigating about 99% of bit-flips injected into both ARM cores’ register data.

AB - An attractive option for realizing applications in radiation environments is to employ All-Programmable System-on-Chips (APSoCs) thanks to their high-performance computing and power efficiency merits. Despite APSoC’s advantages, like any other electronic device, they are prone to radiation effects. Processors found in APSoCs must, therefore, be adequately hardened against ionizing-radiation to become a viable alternative for harsh environments. This paper proposes a novel triple-core lockstep (TCLS) approach to secure the Xilinx Zynq-7000 APSoC dual-core ARM Cortex-A9 processor against radiation-induced soft errors by coupling it with a MicroBlaze TMR subsystem in Zynq’s programmable logic (PL) layer. The proposed strategy uses software-level checkpointing principles along with roll-back and roll-forward mechanisms (i.e. software redundancy), and hardware-level processor replication as well as checker circuits (i.e. hardware redundancy). Results of fault injection experiments show that the proposed solution achieved high soft error security by mitigating about 99% of bit-flips injected into both ARM cores’ register data.

KW - ARM Cortex-A Processor

KW - Fault Tolerance

KW - MicroBlaze Processor

KW - Soft Error Mitigation

KW - Zynq APSoC

UR - http://www.scopus.com/inward/record.url?scp=85099782509&partnerID=8YFLogxK

U2 - 10.1109/norcas51424.2020.9265137

DO - 10.1109/norcas51424.2020.9265137

M3 - Conference proceeding

SN - 9781728192277

T3 - 2020 IEEE Nordic Circuits and Systems Conference, NORCAS 2020 - Proceedings

SP - 1

EP - 7

BT - 2020 IEEE Nordic Circuits and Systems Conference, NORCAS 2020 - Proceedings

A2 - Nurmi, Jari

A2 - Wisland, Dag T.

A2 - Aunet, Snorre

A2 - Kjelgaard, Kristian

PB - IEEE

T2 - 2020 IEEE Nordic Circuits and Systems Conference

Y2 - 27 November 2020 through 28 November 2020

ER -

Novel Lockstep-based Approach with Roll-back and Roll-forward Recovery to Mitigate Radiation-Induced Soft Errors

Abstract

Publication series

Conference

Bibliographical note

Keywords

ASJC Scopus subject areas

Access to Document

Other files and links

Fingerprint

Cite this