Abstract
A 0.6 /spl mu/m CMOS process was adapted to incorporate LDMOS transistors for Power Integrated Circuit Applications. The design was realised by adding only three additional ion implants process steps and one extra masking process step providing a cost effective approach. The design was optimised prior to manufacture by the Avanti TCAD simulation tool. Physical results show good agreement with the simulated device and display 2-D RESURF action.
Original language | English |
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Title of host publication | 2004 24th International Conference on Microelectronics (IEEE Cat. No.04TH8716) |
Publisher | IEEE |
Pages | 133-136 |
Number of pages | 4 |
Volume | 1 |
ISBN (Print) | 0-7803-8166-1 |
DOIs | |
Publication status | Published - 19 May 2004 |
Externally published | Yes |
Event | 2004 24th International Conference on Microelectronics - Nis, Serbia, Nis, Serbia Duration: 16 May 2004 → 19 May 2004 Conference number: 24 |
Conference
Conference | 2004 24th International Conference on Microelectronics |
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Abbreviated title | MIEL 2004 |
Country/Territory | Serbia |
City | Nis |
Period | 16/05/04 → 19/05/04 |
Keywords
- CMOS technology
- Power integrated circuits
- Circuit simulation
- Integrated circuit technology
- CMOS process
- Implants
- Costs
- Design optimization
- Virtual manufacturing
- Displays