Novel 2-D RESURF LDMOSFET in 0.6μm CMOS technology for power ICs

P. M. Holland; T. K.H. Starke; S. Hussain; W. M. Jamal; P. A. Mawby; P. M. Igic

Novel 2-D RESURF LDMOSFET in 0.6μm CMOS technology for power ICs

P. M. Holland, T. K.H. Starke, S. Hussain, W. M. Jamal, P. A. Mawby, P. M. Igic

Swansea University

Research output: Contribution to conference › Paper › peer-review

Abstract

A 0.6um CMOS process was adapted to incorporate LDMOS transistors for Power Integrated Circuit Applications. The design was realised by adding only three additional ion implants process steps and one extra masking process step providing a cost effective approach. The design was optimised prior to manufacture by the Avanti TCAD simulation tool. Physical results show good agreement with the simulated device and display 2-D RESURF action.

Original language	English
Number of pages	4
Publication status	Published - 28 Jul 2004
Externally published	Yes
Event	2004 24th International Conference on Microelectronics - Nis, Serbia, Nis, Serbia Duration: 16 May 2004 → 19 May 2004 Conference number: 24

Conference

Conference	2004 24th International Conference on Microelectronics
Abbreviated title	MIEL 2004
Country/Territory	Serbia
City	Nis
Period	16/05/04 → 19/05/04

ASJC Scopus subject areas

Engineering(all)

Cite this

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title = "Novel 2-D RESURF LDMOSFET in 0.6μm CMOS technology for power ICs",

abstract = "A 0.6um CMOS process was adapted to incorporate LDMOS transistors for Power Integrated Circuit Applications. The design was realised by adding only three additional ion implants process steps and one extra masking process step providing a cost effective approach. The design was optimised prior to manufacture by the Avanti TCAD simulation tool. Physical results show good agreement with the simulated device and display 2-D RESURF action.",

author = "Holland, {P. M.} and Starke, {T. K.H.} and S. Hussain and Jamal, {W. M.} and Mawby, {P. A.} and Igic, {P. M.}",

year = "2004",

month = jul,

day = "28",

language = "English",

note = "2004 24th International Conference on Microelectronics, MIEL 2004 ; Conference date: 16-05-2004 Through 19-05-2004",

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TY - CONF

T1 - Novel 2-D RESURF LDMOSFET in 0.6μm CMOS technology for power ICs

AU - Holland, P. M.

AU - Starke, T. K.H.

AU - Hussain, S.

AU - Jamal, W. M.

AU - Mawby, P. A.

AU - Igic, P. M.

N1 - Conference code: 24

PY - 2004/7/28

Y1 - 2004/7/28

N2 - A 0.6um CMOS process was adapted to incorporate LDMOS transistors for Power Integrated Circuit Applications. The design was realised by adding only three additional ion implants process steps and one extra masking process step providing a cost effective approach. The design was optimised prior to manufacture by the Avanti TCAD simulation tool. Physical results show good agreement with the simulated device and display 2-D RESURF action.

AB - A 0.6um CMOS process was adapted to incorporate LDMOS transistors for Power Integrated Circuit Applications. The design was realised by adding only three additional ion implants process steps and one extra masking process step providing a cost effective approach. The design was optimised prior to manufacture by the Avanti TCAD simulation tool. Physical results show good agreement with the simulated device and display 2-D RESURF action.

UR - http://www.scopus.com/inward/record.url?scp=3142685186&partnerID=8YFLogxK

M3 - Paper

T2 - 2004 24th International Conference on Microelectronics

Y2 - 16 May 2004 through 19 May 2004

ER -

Novel 2-D RESURF LDMOSFET in 0.6μm CMOS technology for power ICs

Abstract

Conference

ASJC Scopus subject areas

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