In this work we explore the appropriate design parameters which will enable the fabrication of a >10kVn-Channel IGBT. In particular, we emphasize the reduction of device blocking capabilities for high temperature environments. Moreover, this work shows that the SiC device design optimization methodology needs to be rethought to account for the significant loss of blocking voltage at the desired elevated operating temperatures. Indeed, device design engineers aiming to optimize a SiC IGBT should design at high temperature and not at room temperature.
|Publication status||Published - Aug 2018|
|Event||The 14th International Seminar on Power Semiconductors (ISPS 2018) - Prague, Czech Republic|
Duration: 29 Aug 2018 → 31 Aug 2018
|Conference||The 14th International Seminar on Power Semiconductors (ISPS 2018)|
|Period||29/08/18 → 31/08/18|
- Blocking Voltage,