Finite element modelling of the thermal stress field during processing of VLSI multilevel structures

P. M. Igic, P. A. Mawby

Research output: Contribution to journalArticle

5 Citations (Scopus)

Abstract

An advanced strategy is presented for modelling thermal stress induced in aluminium interconnections during processing. The advantage of the approach described is that it allows the residual stresses from one technological step to be used as an initial condition for subsequent steps. The particular example demonstrated here is for a passivated aluminium line (silicon-glass-aluminium-glass), however, the technique is readily extendible to more complex situations and material combinations.

Original languageEnglish
Pages (from-to)471-472
Number of pages2
JournalElectronics Letters
Volume34
Issue number5
DOIs
Publication statusPublished - 5 Mar 1998
Externally publishedYes

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Finite element modelling of the thermal stress field during processing of VLSI multilevel structures'. Together they form a unique fingerprint.

  • Cite this