Fast-Processing Capacitor Voltage Balancing Algorithm for Single-End Five-Level NPC Converters Based on Redundant Level Modulation

Jun Wang, Wenzhi Zhou, Wei Xu, Xibo Yuan

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)
17 Downloads (Pure)

Abstract

Five-level neutral point clamped (5L-NPC) topologies have been proposed for the medium-voltage grid and drive applications since the 1990s. However, their practical implementation has been hindered due to the inherent capacitor voltage drift issue, especially in a single-end configuration. This work proposes a fast-processing, carrier-based voltage balancing algorithm to address this issue, which is based on the latest redundant level modulation (RLM) concept. The proposed approach is fully based on closed-form expressions and basic logic operations, which can be straightforwardly programmed in microcontrollers, as enabled by a fully transparent mathematical model. In contrast, the existing methods treat it as a black box problem, which requires mandatory PI/PID controllers that complicate the implementation. This method shows effective and superior voltage balancing performance against existing methods without affecting the converter output capacity throughout all operating conditions. The fundamental principles and analysis of the capacitor operation are presented to enable a better understanding of the problem and its solution. This work also evaluates the increased switching actions as a side effect of the RLM operation, which is the mandatory cost for all known modulation-based voltage balancing approaches for 5L-NPC converters. For comparison across different systems, a new normalization term is proposed to quantify the capacitor voltage ripples for evaluation with the switching frequency factored in.
Original languageEnglish
Pages (from-to)924-938
Number of pages15
JournalIEEE Transactions on Power Electronics
Volume39
Issue number1
Early online date31 Oct 2023
DOIs
Publication statusPublished - Jan 2024
Externally publishedYes

Bibliographical note

This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/

Funder

This work was supported in part by the U.K. EPSRC National Center for Power Electronics under Grant EP/R004137/1, and in part by the U.K. Royal Academy of Engineering and the University of Bristol under the Engineering Faculty Postdoctoral Research Prize.

Keywords

  • Five-level
  • grid modernization
  • multilevel converter
  • neutral point clamped (NPC)
  • voltage balancing

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