Current collapse due to the trapping/de-trapping of the carriers at the surface and in the bulk of a 0.25 µm gate length AlGaN/GaN high electron mobility transistor is investigated using 2d technology computer aided design transient simulations. Gate and drain pulse techniques are used to study the dynamic picture of trapping and de-trapping of carriers within drift-diffusion and hydrodynamic transport models. In addition, coupled electrical and thermal simulations are performed to model the energy exchange of the carriers with the lattice and to predict electron temperature in the channel. It is found that current degradation upon electrical stress is due to two different types of traps, donor-like traps and acceptor-like traps, respectively. The collapse next to 5% and 75% was observed for bulk and surface traps, respectively. The combined effect of surface and bulk traps on current transient characteristics has been investigated and simulations are in very good qualitative agreement with the experimental observations.
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