Deep p-ring trench termination: An innovative and cost-effective way to reduce silicon area

Marina Antoniou, Neophytos Lophitis, Florin Udrea, Munaf T. Rahimo, Umamaheswara Reddy Vemulapati, Ciara Corvarsce, Uwe Badstuebner

Research output: Contribution to journalArticle

1 Citation (Scopus)
33 Downloads (Pure)

Abstract

A new type of high-voltage termination, namely the 'deep p-ring trench' termination design for high-voltage, high-power devices, is presented and extensively simulated. Termination of such devices consumes a large proportion of the chip size; the proposed design concept not only reduces the termination silicon area required but also removes the need for an additional mask as is the case of the traditional p+ ring-type termination. Furthermore, the presence of the p-ring under and around the bottom of the trench structure reduces the electric field peaks at the corners of the oxide, which results in reduced hot carrier injection and improved device reliability.

Original languageEnglish
Pages (from-to)177 - 180
Number of pages4
JournalIEEE Electron Device Letters
Volume40
Issue number2
Early online date3 Jan 2019
DOIs
Publication statusPublished - Feb 2019

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Keywords

  • high voltage
  • Power semiconductor devices
  • termination

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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  • Cite this

    Antoniou, M., Lophitis, N., Udrea, F., Rahimo, M. T., Vemulapati, U. R., Corvarsce, C., & Badstuebner, U. (2019). Deep p-ring trench termination: An innovative and cost-effective way to reduce silicon area. IEEE Electron Device Letters, 40(2), 177 - 180. https://doi.org/10.1109/LED.2018.2890702