Component-wise instruction-cache behavior prediction

A. Rakib, O. Parshin, S. Thesing, R. Wilhelm

Research output: Chapter in Book/Report/Conference proceedingChapterpeer-review

7 Citations (Scopus)


The precise determination of worst-case execution times (WCETs) for programs is mostly being performed on fully linked executables, since all needed information is available and all machine parameters influencing cache performance are available to the analysis. This paper describes how to perform a component-wise prediction of the instruction cache behavior guaranteeing conservative results compared to an analysis of a fully linked executable. This proves the correctness of the method based on a previous proof of correctness of the analysis of fully linked executables. The analysis is described for a general A-way set associative cache. The only assumption is that the replacement strategy is LRU.
Original languageEnglish
Title of host publicationLecture Notes in Computer Science
EditorsF Wang
Number of pages19
Publication statusPublished - 2004
Externally publishedYes

Bibliographical note

Copyright © Elsevier B.V


  • Buffer storage
  • Cache performance
  • Instruction caches
  • Machine parameters
  • Precise determinations
  • Proof of correctness
  • Replacement strategy
  • Set associative cache
  • Worst-case execution time
  • Cache memory


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