A Parallel Hardware Multiple Microprocessor Asynchronous Neural Network Architecture for Control Applications

James Shippen, R. Westra, N.D. Freear

Research output: Chapter in Book/Report/Conference proceedingConference proceeding

Original languageEnglish
Title of host publicationEUFIT '99 (Abstract Booklet with CD Rom)
PublisherELITE Foundation (European Laboratory for Intelligent Techniques Engineering)
Publication statusPublished - Sep 1999

Bibliographical note

This presentation was given at the EUFIT 99 annual conference at the University of Aachen, Germany, 14-16 September 1999. The full text of this item is not available from the repository.

Cite this

Shippen, J., Westra, R., & Freear, N. D. (1999). A Parallel Hardware Multiple Microprocessor Asynchronous Neural Network Architecture for Control Applications. In EUFIT '99 (Abstract Booklet with CD Rom) ELITE Foundation (European Laboratory for Intelligent Techniques Engineering).