384 TMAC/s FIR filtering on an Artix-7 FPGA using Prism signal processing

John Owen, Manus Henry

Research output: Chapter in Book/Report/Conference proceedingConference proceeding

6 Citations (Scopus)

Abstract

The Xilinx Artix-7 family of FPGAs has a peak DSP performance of approximately 1 TMAC/s. This paper describes a floating point FIR bandpass filter instantiation on an Artix-7 with up to 192 million taps, updated at up to 2 MHz, delivering an equivalent performance of up to 384 TMAC/s, while using only one third of the DSP resources on the FPGA. This has been achieved using Prism signal processing, a new recursive FIR filtering technique. Filter design is simple; a PC host HMI facilitates the immediate creation of new filter implementations. Examples of experimental results are provided.

Original languageEnglish
Title of host publicationProceedings
Subtitle of host publicationIECON 2018 - 44th Annual Conference of the IEEE Industrial Electronics Society
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages2659-2664
Number of pages6
ISBN (Electronic)9781509066841
DOIs
Publication statusPublished - 26 Dec 2018
Externally publishedYes
Event44th Annual Conference of the IEEE Industrial Electronics Society (IECON 2018) - Washington, United States
Duration: 21 Oct 201823 Oct 2018
Conference number: 44th
http://www.iecon2018.org/

Publication series

NameProceedings: IECON 2018 - 44th Annual Conference of the IEEE Industrial Electronics Society

Conference

Conference44th Annual Conference of the IEEE Industrial Electronics Society (IECON 2018)
Abbreviated titleIECON 2018
CountryUnited States
CityWashington
Period21/10/1823/10/18
Internet address

Keywords

  • Artix-7
  • Bandpass filtering
  • FPGA
  • Prism signal processing
  • Recursive FIR filtering

ASJC Scopus subject areas

  • Energy Engineering and Power Technology
  • Electrical and Electronic Engineering
  • Industrial and Manufacturing Engineering
  • Control and Optimization

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