Abstract
The Xilinx Artix-7 family of FPGAs has a peak DSP performance of approximately 1 TMAC/s. This paper describes a floating point FIR bandpass filter instantiation on an Artix-7 with up to 192 million taps, updated at up to 2 MHz, delivering an equivalent performance of up to 384 TMAC/s, while using only one third of the DSP resources on the FPGA. This has been achieved using Prism signal processing, a new recursive FIR filtering technique. Filter design is simple; a PC host HMI facilitates the immediate creation of new filter implementations. Examples of experimental results are provided.
Original language | English |
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Title of host publication | Proceedings |
Subtitle of host publication | IECON 2018 - 44th Annual Conference of the IEEE Industrial Electronics Society |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 2659-2664 |
Number of pages | 6 |
ISBN (Electronic) | 9781509066841 |
DOIs | |
Publication status | Published - 26 Dec 2018 |
Externally published | Yes |
Event | 44th Annual Conference of the IEEE Industrial Electronics Society (IECON 2018) - Washington, United States Duration: 21 Oct 2018 → 23 Oct 2018 Conference number: 44th http://www.iecon2018.org/ |
Publication series
Name | Proceedings: IECON 2018 - 44th Annual Conference of the IEEE Industrial Electronics Society |
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Conference
Conference | 44th Annual Conference of the IEEE Industrial Electronics Society (IECON 2018) |
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Abbreviated title | IECON 2018 |
Country/Territory | United States |
City | Washington |
Period | 21/10/18 → 23/10/18 |
Internet address |
Keywords
- Artix-7
- Bandpass filtering
- FPGA
- Prism signal processing
- Recursive FIR filtering
ASJC Scopus subject areas
- Energy Engineering and Power Technology
- Electrical and Electronic Engineering
- Industrial and Manufacturing Engineering
- Control and Optimization