Accepting PhD Students

    Calculated based on number of publications stored in Pure and citations from Scopus
    20082022

    Research activity per year

    Personal profile

    Research Interests

    Fault-Tolerant Embedded Systems Computing
    High-Performance Reconfigurable Computing
    FPGA Hardware Design and Implementation
    Hardware Acceleration of Scientific Computing Applications
    Hardware/Software Co-Design

    Biography

    Server is a Lecturer in Electrical and Electronic Engineering within the School of Computing, Electronics and Mathematics, Coventry University. Prior to his appointment, he was working as a senior research officer at the National Centre for Nuclear Robotics in the School of Computer Science and Electronics at the University of Essex, UK. In the NCNR which is funded by an EPSRC grant, he was developing fault-tolerant hardware- and software-based hybrid solutions to protect embedded processors against radiation-induced faults, errors and failures.

    Before joining NCNR, he served as an Assistant Professor in the American University of the Middle East (AUM, affiliated with the Purdue University), Kuwait and the European University of Lefke (EUL), Cyprus in Computer and Electronics Engineering departments, where he delivered a number of classes and tutorials at both undergraduate and graduate levels, and coordinated postgraduate studies within the faculty in EUL. In addition to teaching and coordination activities in these universities, he conducted extensive research on high-performance reconfigurable computing, FPGA hardware design and implementation, and hardware/software co-design for scientific computing applications.

    Over the years, he has been involved in several research projects where he has developed custom computer architectures for various applications and implemented them on FPGA-based System-on-Chips/embedded systems using hardware-software co-design methodologies. The subject areas he has worked on so far include bioinformatics and computational biology, digital signal processing and biological neural network simulations along with fault-tolerant computing.

    He welcomes inquiries about his work and is open for research collaboration. He also welcomes inquiries from PhD candidates.

    Education/Academic qualification

    Computer Engineering, Doctorate, High Performance Reconfigurable Architectures for Bioinformatics and Computational Biology Applications, University of Edinburgh

    Sept 2007Nov 2010

    System Level Integration, MSc, Low Power Implementation of Reed Solomon Encoder and Decoder, University of Edinburgh

    Sept 2006Aug 2007

    Electrical and Electronics Engineering, Degree, Middle East Technical University

    Sept 2002Jun 2006

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